﻿@inproceedings{
xie:aspdac05a,
   Author = {Conner, J. and Xie, Y. and Kandemir, M. and Link, G. and Dick, R.},
   Title = {FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection},
   BookTitle = {Asia and South Pacific Design Automation Conference},
   Volume = {2},
   Pages = {709-712 Vol. 2},
   Year = {2005} }



@inproceedings{
xie:isqed04,
   Author = {Degalahal, V. and Ramanarayanan, R. and Vijaykrishnan, N. and Xie, Y. and Irwin, M. J.},
   Title = {The effect of threshold voltages on the soft error rate [memory and logic circuits]},
   BookTitle = {International Symposium on Quality Electronic Devices},
   Pages = {503-508},
   Year = {2004} }



@inproceedings{
xie:socc06-tsinghua,
   Author = {Ding, Qian and Luo, Rong and Wang, Hui and Yang, Huazhong and Xie, Yuan},
   Title = {Modeling the Impact of Process Variation on Critical  Charge Distribution},
   BookTitle = {IEEE International SOC Conference},
   Year = {2006} }



@inproceedings{
xie:asicon05-ser,
   Author = {Ding, Qian and LUO, Rong and XIE, Yuan},
   Title = {Impact of Process Variation on Soft Error Vulnerability for Nanometer VLSI Circuits},
   BookTitle = {International Conference on ASICs},
   Year = {2005} }



@inproceedings{
xie:isvlsi05,
   Author = {Hostetler, D. and Xie, Yuan},
   Title = {Adaptive power management in software radios using resolution adaptive analog to digital converters},
   BookTitle = { IEEE Computer Society Annual Symposium on  Emerging VLSI Technologies and Architectures },
   Pages = {186-191},
   Year = {2005} }



@inproceedings{
xie:iccd04,
   Author = {Hung, W. and Addo-Quaye, C. and Theocharides, T. and Xie, Y. and Vijakrishnan, N. and Irwin, M. J.},
   Title = {Thermal-aware IP virtualization and placement for networks-on-chip architecture},
   BookTitle = {IEEE International Conference on Computer Design.},
   Pages = {430-437},
   Year = {2004} }



@inproceedings{
xie:islped04,
   Author = {Hung, W. and Xie, Y. and Vijaykrishnan, N. and Kandemir, M. and Irwin, M. J. and Tsai, Y.},
   Title = {Total Power Optimization through Simultaneously Multiple-VDD Multiple-VTH Assignment and Device Sizing with Stack Forcing},
   BookTitle = {International Symposium on Low Power Electronics and Design.},
   Pages = {144-149},
   Year = {2004} }



@inproceedings{
xie:iccd05-vi,
   Author = {Hung, W. L. and Link, G. M. and Xie, Yuan and Vijaykrishnan, N. and Dhanwadaf, N. and Conner, J.},
   Title = {Temperature-aware voltage islands architecting in system-on-chip design},
   BookTitle = {International Conference on Computer Design},
   Pages = {689-694},
   Year = {2005} }



@inproceedings{
xie:isqed06-3d,
   Author = {Hung, W. L. and Link, G. M. and Xie, Y. and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Interconnect and Thermal-aware Floorplanning for 3D Microprocessors},
   BookTitle = {International Symposium on Quality Electronic Device},
   Pages = {98-104},
   Year = {2006} }



@inproceedings{
xie:isqed05-thermal,
   Author = {Hung, W. L. and Xie, Y. and Vijaykrishnan, N. and Addo-Quaye, C. and Theocharides, T. and Irwin, M. J.},
   Title = {Thermal-aware floorplanning using genetic algorithms},
   BookTitle = {Sixth International Symposium on  Quality of Electronic Design },
   Pages = {634-639},
   Year = {2005} }



@inproceedings{
xie:date05-thermal,
   Author = {Hung, W. L. and Xie, Y. and Vijaykrishnan, N. and Kandemir, M. and Irwin, M. J.},
   Title = {Thermal-aware task allocation and scheduling for embedded systems},
   BookTitle = {Design Automation and Test in Europe.},
   Pages = {898-899 Vol. 2},
   Year = {2005} }



@inproceedings{
xie:iccad06,
   Author = {Hung, Wei-lun and Wu, Xiaoxia and Xie, Yuan},
   Title = {Guarantee Performance Yield in High Level Synthesis},
   BookTitle = {International Conference on Computer Aids Design},
   Year = {2006} }



@inproceedings{
xie:mse07,
   Author = {Jones, Alex K. and Levitan, Steven and Rutenbar, Rob A. and Xie, Yuan},
   Title = {Collaborative VLSI-CAD Instruction in the Digital Sandbox},
   BookTitle = {Proceedings of IEEE International Conference on Microelectronic Systems Education},
   Pages = {141-142},
   Year = {2007} }



@inproceedings{
xie:isca07,
   Author = {Kim, J. and Nicopoulos, C. and Park, D. and Das, R. and Xie, Yuan and Vijaykrishnan, N. and Das, C.},
   Title = {A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures},
   BookTitle = {Proceedings of the Annual International Symposium on Computer Architecture},
   Year = {2007} }

@inproceedings{
xie:isca08,
   Author = {Park, D. and Eachempati, S. and Das, R. and Xie, Yuan and Vijaykrishnan, N. and Das, C.},
   Title = {MIRA: A Multi-layer On Chip Interconnect Router Architecture},
   BookTitle = {Proceedings of the Annual International Symposium on Computer Architecture},
   Year = {2008} }

@inproceedings{
xie:isqed07-ser,
   Author = {Krishnan, Ramakrishnan and Ramanarayanan, Rajaraman and Srinivasan, Suresh and Narayanan, Vijaykrishnan and Xie, Yuan and Irwin, Mary Jane},
   Title = {Variation Impact on SER of Combinational Circuits.  },
   BookTitle = {International Symopsium on on Quality Electronic Devices (ISQED)},
   Year = {2007} }



@inproceedings{
xie:isca06,
   Author = {Li, F. and Nicopoulos, C. and Richardson, T. and Xie, Y. and Vijaykrishnan, N. and Kandemir, M.},
   Title = {Design and management of 3D chip multiprocessors using network-in-memory},
   BookTitle = {International Symposium on Computer Architecture (ISCA'06)},
   Year = {2006} }



@inproceedings{
xie:date04,
   Author = {Lin, Chang Hong and Xie, Yuan and Wolf, W.},
   Title = {LZW-based code compression for VLIW embedded systems},
   BookTitle = {Design Automation and Test in Europe},
   Volume = {3},
   Pages = {76-81  },
   Year = {2004} }



@article{
xie:tvlsi07,
   Author = {Lin, Chang-hong and Xie, Yuan and W.Wolf},
   Title = {Code Compression for VLIW Embedded Systems Using a Self-Generating Table},
   Journal = {IEEE Transactions on Very Large Scale Integration Systems},
   Volume = {15},
   Number = {10},
   Year = {2007} }



@article{
xie:micro07,
   Author = {Loh, Gabriel and Xie, Yuan and Black, Bryan},
   Title = {Processor Design in Three-Dimensional Die-Stacking Technologies},
   Journal = {IEEE Micro},
   Volume = {27},
   Number = {3},
   Pages = {31-48},
   Year = {2007} }



@inproceedings{
xie:isqed07-nbti,
   Author = {Luo, Hong and Wang, Yu and He, Ku and Luo, Rong and Yang, Huazhong and Xie, Yuan},
   Title = {Modeling of PMOS NBTI Effect Considering Temperature Variation},
   BookTitle = { International Symposium on Quality Electronic Devices (ISQED)},
   Year = {2007} }



@inproceedings{
xie:tutorial-isca05,
   Author = {Mitra, S. and Vijaykrishnan, N. and Spainhower, L. and Xie, Y.},
   Title = {Tutorial: Robust System Design from Unreliable Components},
   BookTitle = {The 32nd Annual International Symposium on Computer Architecture (ISCA)},
   Year = {2005} }



@inproceedings{
xie:isvlsi06-bus,
   Author = {Mutyam, M. and Eze, M. and Vijaykrishnan, N. and Xie, Y.},
   Title = {Delay and energy efficient data transmission for on-chip buses},
   BookTitle = {IEEE Computer Society Annual Symposium on  Emerging VLSI Technologies and Architectures },
   Volume = {00},
   Pages = {6 pp.},
   Year = {2006} }



@inproceedings{
xie:iccd05-loop,
   Author = {Narayanan, S. H. K. and Chen, G. and Kandemir, M. and Xie, Y.},
   Title = {Temperature-sensitive loop parallelization for chip multiprocessors},
   BookTitle = {International Conference on Computer Design},
   Pages = {677-682},
   Year = {2005} }



@article{
xie:computer06,
   Author = {Narayanan, V and Xie, Yuan},
   Title = {Reliability concerns in embedded system designs},
   Journal = {IEEE Computer},
   Volume = {39},
   Number = {1},
   Pages = {118-120},
   Year = {2006} }



@inproceedings{
xie:aspdac06,
   Author = {Ozturk, O. and Wang, Feng and Kandemir, M. and Xie, Yuan},
   Title = {Optimal topology exploration for application-specific 3D architectures},
   BookTitle = {Asia and South Pacific Design Automation Conference},
   Pages = {6 pp.},
   Year = {2006} }



@article{
xie:tdsc,
   Author = {Rajaraman, R. and Degalahal, V. and Kim, J. S. and Vijaykrishnan, N. and Xie, Y. and Irwin, M. J.},
   Title = {Modeling Soft Errors at Device and Logic Level for Combinational Circuits},
   Journal = {IEEE Transactions on Dependable and Secure Computing },
   Year = {} }



@inproceedings{
xie:vlsid06-raj,
   Author = {Ramanarayanan, R. and Kim, J. S. and Vijaykrishnan, N. and Xie, Y. and Irwin, M. J.},
   Title = {SEAT-LA: A Soft Error Analysis tool for Combinational Logic. },
   BookTitle = {IEEE International Conference on VLSI Design},
   Year = {2006} }



@inproceedings{
xie:selse06-raj,
   Author = {Ramanarayanan, R. and Krishnan, R. and Vijaykrishnan, N. and Xie, Yuan and Irwin, Mary J.},
   Title = {Temperature and Voltage Scaling Effects on Electrical Masking,},
   BookTitle = {The Second Workshop on System Effects of Logic Soft Errors},
   Year = {2006} }



@inproceedings{
xie:vlsid06-bus,
   Author = {Richardson, T. D. and Nicopoulos, C. and Park, D. and Narayanan, V. and Xie, Yuan and Das, C. and Degalahal, V.},
   Title = {A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks},
   BookTitle = {International Conference on VLSI Design},
   Pages = {8 pp.},
   Year = {2006} }



@inproceedings{
xie:asic05,
   Author = {Richardson, T. D. and Xie, Yuan},
   Title = {Evaluation of Thermal-Aware Design Techniques for Microprocessors},
   BookTitle = {International Conference on ASICs},
   Volume = {1},
   Pages = {62-65},
   Year = {2005} }



@inproceedings{
xie:iccad04,
   Author = {Srinivasan, S. and Gayasen, A. and Vijaykrishnan, N. and Kandemir, M. and Xie, Y. and Irwin, M. J.},
   Title = {Improving soft-error tolerance of FPGA configuration bits},
   BookTitle = { IEEE/ACM International Conference on  Computer Aided Design },
   Pages = {107-110},
   Year = {2004} }



@article{
xie:tdcs_1,
   Author = {Srinivasan, S. and Krishnan, R. and Mangalagiri, P. and Xie, Yuan and Vijaykrishnan, N.},
   Title = {Towards Increasing FPGA Lifetime},
   Journal = {IEEE Transactions on Dependable and Secure Computing },
   Year = {} }



@inproceedings{
xie:dac06,
   Author = {Srinivasan, Suresh and Mangalagiri, Prashanth and Sarpatwari, Karthik and Xie, Yuan and Vijaykrishnan, N.},
   Title = {FLAW: FPGA Lifetime AWareness},
   BookTitle = {Design Automation Conference (DAC)},
   Year = {2006} }



@inproceedings{
xie:iccd07_1,
   Author = {Srinivasan, S. and Mangalagiri, P. and Xie, Yuan and Vijaykrishnan, N.},
   Title = {FPGA Routing Architecture Analysis Under Variations},
   BookTitle = {Proceedings of International Conference on Computer Design},
   Year = {2007} }



@inproceedings{
xie:date05-tosun,
   Author = {Tosun, S. and Mansouri, N. and Arvas, E. and Kandemir, M. and Xie, Y.},
   Title = {Reliability-centric high-level synthesis},
   BookTitle = {Design Automation and Test in Europe},
   Pages = {1258-1263 Vol. 2},
   Year = {2005} }



@inproceedings{
xie:isqed05-tosun,
   Author = {Tosun, S. and Mansouri, N. and Arvas, E. and Kandemir, M. and Xie, Y. and Hung, W. L.},
   Title = {Reliability-centric hardware/software co-design},
   BookTitle = {Sixth International Symposium on  Quality of Electronic Design},
   Pages = {375-380},
   Year = {2005} }



@inproceedings{
xie:isqed05-hls,
   Author = {Tosun, S. and Ozturk, O. and Mansouri, N. and Arvas, E. and Kandemir, M. and Xie, Y. and Hung, W. L.},
   Title = {An ILP formulation for reliability-oriented high-level synthesis},
   BookTitle = {Sixth International Symposium on  Quality of Electronic Design },
   Pages = {364-369},
   Year = {2005} }



@inproceedings{
xie:date05-noc,
   Author = {Tsai, Yuh-Fang and Narayaynan, V. and Xie, Yuan and Irwin, M. J.},
   Title = {Leakage-aware interconnect for on-chip network},
   BookTitle = {Design Automation and Test in Europe},
   Pages = {230-231 Vol. 1},
   Year = {2005} }



@inproceedings{
xie:vlsid05-variation,
   Author = {Tsai, Yuh-Fang and Vijaykrishnan, N. and Xie, Yuan and Irwin, M. J.},
   Title = {Influence of leakage reduction techniques on delay/leakage uncertainty},
   BookTitle = {International Conference on VLSI Design},
   Pages = {374-379},
   Year = {2005} }



@article{
xie:tvlsi_1,
   Author = {Tsai, Yuh-fang and Wang, Feng and Xie, Yuan and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Design Space Exploration for Three- Dimensional Cache},
   Journal = {IEEE Transactions on Very Large Scale Integration Systems},
   Year = {2008} }



@inproceedings{
xie:iccd05-3d,
   Author = {Tsai, Yuh-Fang and Xie, Yuan and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Three-dimensional cache design exploration using 3DCacti},
   BookTitle = {International Conference on Computer Design (ICCD)},
   Pages = {519-524},
   Year = {2005} }



@inproceedings{
xie:socc06-balaji,
   Author = {Vaidyanathan, Balaji and Xie, Yuan},
   Title = {Crosstalk-Aware Energy Efficient Encoding for Instruction Bus through Code Compression},
   BookTitle = {IEEE International SOC Conference},
   Year = {2006} }



@inproceedings{
xie:apccas06,
   Author = {Vaidyanathan, Balaji and Xie, Yuan and Vijaykrishnan, N.},
   Title = {Leakage Optimized DECAP Design for FPGAs},
   BookTitle = {IEEE ASia Pacific Conference on Circuits and Systems},
   Year = {2006} }



@inproceedings{
xie:selse06-balaji,
   Author = {Vaidyanathan, Balaji and Xie, Yuan and Vijaykrishnan, N. and Zheng, Hao},
   Title = {Soft Error Analysis and Optimizations of C-elements in Asynchronous Circuits},
   BookTitle = {The Second Workshop on System Effects of Logic Soft Errors},
   Year = {2006} }



@article{
xie:cdt,
   Author = {Wang, Feng and Debole, Mike and Wu, Xiaoxia and Xie, Yuan and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {On-chip Bus Thermal Analysis and Optimization},
   Journal = {IET Computer and Digital Techniques},
   Year = {} }



@inproceedings{
xie:iccad07,
   Author = {Wang, Feng and Nicopoulos, C. and Wu, Xiaoxia and Xie, Yuan and Vijaykrishnan, N.},
   Title = {Variation-aware Task Allocation and Scheduling for MPSoC},
   BookTitle = {ICCAD},
   Year = {2007} }



@inproceedings{
xie:aspdac08,
   Author = {Wang, Feng and Wu, Xiaoxia and Xie, Yuan},
   Title = {Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning},
   BookTitle = {Proceedings of Asia-South Pacific Design Automation Conference },
   Year = {2008} }



@inproceedings{
xie:selse06-wang,
   Author = {Wang, Feng and Xie, Yuan},
   Title = {An Accurate and Efficient Model of Electrical Masking Effect for SE in Combinatorial Logic},
   BookTitle = {The Second Workshop on System Effects of Logic Soft Errors},
   Year = {2006} }



@techreport{
xie:criticality,
   Author = {Wang, Feng and Xie, Yuan},
   Title = {A Fast and Accurate Criticality Computation Method in Statistical Timing Analysis},
   Institution = {Pennsylvania State University},
   Number = {Technical Report, Computer Science Engineering Department},
   Month= {May},
      Year = {2006} }



@inproceedings{
xie:date07-timing,
   Author = {Wang, Feng and Xie, Yuan},
   Title = {A Novel Criticality Computation Method in Statistical Timing Analysis},
   BookTitle = {Design Automation and Test in Europe},
   Year = {2007} }



@inproceedings{
xie:isvlsi06-finfet,
   Author = {Wang, Feng and Xie, Yuan and Bernstein, K. and Luo, Yan},
   Title = {Dependability analysis of nano-scale FinFET circuits},
   BookTitle = { IEEE Computer Society Annual Symposium on  Emerging VLSI Technologies and Architectures },
   Volume = {00},
   Pages = {6 pp.},
   Year = {2006} }



@inproceedings{
xie:vlsid07-ser,
   Author = {Wang, Feng and Xie, Yuan and Ramanarayanan, R.},
   Title = {Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model},
   BookTitle = {International Conference on VLSI Design},
   Year = {2007} }



@inproceedings{
xie:date07-nbti,
   Author = {Wang, Yu and Luo, Hong and He, Ku and Luo, Rong and Xie, Yuan and Yang, Huazhong},
   Title = {Temperature-aware NBTI modeling and the impact of input vector control on performance degradation},
   BookTitle = {Design Automation and Test in Europe},
   Year = {2007} }



@inproceedings{
xie:iccd07,
   Author = {Wu, Xiaoxia and Falkenstern, Paul and Xie, Yuan},
   Title = {Scan Chain Design for Three-dimensional (3D) ICs},
   BookTitle = {Proceedings of International Conference on Computer Design},
   Year = {2007} }



@phdthesis{
xie:thesis,
   Author = {Xie, Yuan},
   Title = {Code Compression and Decompression Architectures for Embedded VLIW Processors},
   School = {Princeton University},
      Year = {2002} }



@inproceedings{
xie:tutorial-aspdac05,
   Author = {Xie, Y.},
   Title = {Tutorial:  Designing Reliable Circuits},
   BookTitle = {Asia and South Pacific Design Automation Conference},
   Year = {2005} }



@inproceedings{
xie:tutorial-asic05,
   Author = {Xie, Y.},
   Title = {Tutorial:  Thermal-Aware Design Techniques for Nanometer VLSI Design},
   BookTitle = {International Conference on ASICs},
   Year = {2005} }



@article{
xie:jvlsi06-mpsoc,
   Author = {Xie, Y. and Hung, W.},
   Title = {Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-chip (MPSoC) Design},
   Journal = {Journal of VLSI for Signal Processing, to appear.},
   Year = {2006} }



@inproceedings{
xie:asap04,
   Author = {Xie, Y. and Li, L. and Kandemir, M. and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Reliability-aware co-synthesis for embedded systems},
   BookTitle = {15th IEEE International Conference on  Application-Specific Systems, Architectures and Processors },
   Pages = {41-50},
   Year = {2004} }



@article{
xie:jvlsi06,
   Author = {Xie, Y. and Li, L. and Kandemir, M. and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Reliability-aware co-synthesis for embedded systems},
   Journal = {Journal of VLSI for Signal Processing},
   Pages = {to appear.},
   Year = {2006} }



@article{
xie:sp07,
   Author = {Xie, Yuan and Li, Lin and Kandemir, M. and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Reliability-Aware Co-synthesis for Embedded Systems},
   Journal = {Journal of VLSI Signal Processing},
   Year = {2007} }



@inproceedings{
xie:sasimi00,
   Author = {Xie, Y. and Lin, H. and Wu, Z. and Wolf, W. and Kyoto, Japan.},
   Title = {CAD Techniques for Multimedia System Design},
   BookTitle = {The Ninth Workshop on Synthesis and System Integration of MIxed Technologies  },
   Year = {2000} }



@article{
xie:jetcs06,
   Author = {Xie, Y. and Loh, G and Black, B and Bernstein, K.},
   Title = {Design Space Exploration for 3D Architectures},
   Journal = {ACM Journal of Emerging Technologies in Compuing Systems},
   Year = {2006} }



@inproceedings{
xie:tutorial-micro06,
   Author = {Xie, Y. and Loh, G. and Black, B. and Bernstein, K.},
   Title = {Tutorial: 3D Integration  for Microarchitecture},
   BookTitle = {The 39th Annual IEEE/ACM International Symposium on Microarchitecture},
   Year = {2006} }



@inproceedings{
xie:tutorial-asplos04,
   Author = {Xie, Y. and Vijaykrishnan, N.},
   Title = {Tutorial:  Computing in the Presence of Soft Errors},
   BookTitle = {11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)},
   Year = {2004} }



@article{
xie:tvlsi07_1,
   Author = {Xie, Yuan and W.Wolf and Lekatsas, H.},
   Title = {Decompression Unit Design for VLIW Embedded Processors},
   Journal = {IEEE Transactions on Very Large Scale Integration Systems (TVLSI)},
   Volume = {15},
   Number = {8},
   Pages = {975-980},
   Year = {2007} }



@inproceedings{
xie:aspdac00,
   Author = {Xie, Yuan and Wolf, W.},
   Title = {Co-synthesis with custom ASICs},
   BookTitle = {Asia and South Pacific Design Automation Conference},
   Pages = {129-133},
   Year = {2000} }



@inproceedings{
xie:date01,
   Author = {Xie, Yuan and Wolf, W.},
   Title = {Allocation and scheduling of conditional task graph in hardware/software co-synthesis},
   BookTitle = {Design Autmation and Test in Europe },
   Pages = {620-625},
   Year = {2001} }



@inproceedings{
xie:asic01a,
   Author = {Xie, Yuan and Wolf, W.},
   Title = {ASICosyn: co-synthesis of conditional task graphs with custom ASICs},
   BookTitle = {International Conference on ASICs},
   Pages = {130-135},
   Year = {2001} }



@inproceedings{
xie:micro01,
   Author = {Xie, Yuan and Wolf, W. and Lekatsas, H.},
   Title = {A code decompression architecture for VLIW processors},
   BookTitle = {34th ACM/IEEE International Symposium on Microarchitecture},
   Pages = {66-75},
   Year = {2001} }



@inproceedings{
xie:asic01b,
   Author = {Xie, Yuan and Wolf, W. and Lekatsas, H.},
   Title = {Compression ratio and decompression overhead tradeoffs in code compression for VLIW architectures},
   BookTitle = {International Conference on ASICs},
   Pages = {337-340},
   Year = {2001} }



@inproceedings{
xie:isss02,
   Author = {Xie, Yuan and Wolf, W. and Lekatsas, H.},
   Title = {Code compression for VLIW processors using variable-to-fixed coding},
   BookTitle = {International Symposium on System Synthesis},
   Pages = {138-143},
   Year = {2002} }



@inproceedings{
xie:dcc03,
   Author = {Xie, Yuan and Wolf, W. and Lekatsas, H.},
   Title = {Code compression using variable-to-fixed coding based on arithmetic coding},
   BookTitle = {Data Compression Conference},
   Pages = {382-391},
   Year = {2003} }



@inproceedings{
xie:date03,
   Author = {Xie, Yuan and Wolf, W. and Lekatsas, H.},
   Title = {Profile-driven selective code compression [embedded systems]},
   BookTitle = {Design Automation and Test in Europe},
   Pages = {462-467},
   Year = {2003} }



@article{
xie:tvlsi06,
   Author = {Xie, Y. and Wolf, W. and Lekatsas, H.},
   Title = {Code Compression for Embedded VLIW Processors Using Variable-to-Fixed Coding},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {14},
   Number = {5},
   Pages = {525-536},
   Year = {2006} }



@article{
xie:jcsc03,
   Author = {Xie, Y. and Xu, J. and Wolf, W.},
   Title = {Augmenting Platform-based Design with Synthesis Tools},
   Journal = {Journal of Circuits, Systems and Computers},
   Volume = {12},
   Number = {2},
   Pages = {125-142},
   Year = {2003} }



@inproceedings{
xie:glsvlsi04,
   Author = {Xu, Wei and Vijaykrishnan, N. and Xie, Y. and Irwin, M. J.},
   Title = {Design of a nanosensor array architecture },
   BookTitle = {the 14th ACM Great Lakes symposium on VLSI },
   Pages = {298-303},
   Year = {2004} }



@inproceedings{
xie:date05b,
   Author = {Yang, Shengqi and Wolf, W. and Vijaykrishnan, N. and Serpanos, D. N. and Xie, Yuan},
   Title = {Power attack resistant cryptosystem design: a dynamic voltage and frequency switching approach},
   BookTitle = {Design, Automation and Test in Europe},
   Pages = {64-69  },
   Year = {2005} }



@inproceedings{
xie:isvlsi06-soc,
   Author = {Yang, Shengqi and Wolf, W. and Vijaykrishnan, N. and Xie, Y.},
   Title = {Reliability-aware SOC voltage islands partition and floorplan},
   BookTitle = {IEEE Computer Society Annual Symposium on  Emerging VLSI Technologies and Architectures },
   Volume = {00},
   Year = {2006} }



@inproceedings{
xie:vlsid05a,
   Author = {Yang, Shengqi and Wolf, W. and Vijaykrishnan, N. and Xie, Yuan and Wang, Wenping},
   Title = {Accurate stacking effect macro-modeling of leakage power in sub-100 nm circuits},
   BookTitle = { 18th International Conference on  VLSI Design },
   Pages = {165-170},
   Year = {2005} }



@inproceedings{
xie:aspdac05b,
   Author = {Yang, Shengqi and Wolf, W. and Wang, Wenping and Vijaykrishnan, N. and Xie, Yuan},
   Title = {Low-leakage robust SRAM cell design for sub-100nm technologies},
   BookTitle = {Asia and South Pacific  Design Automation Conference },
   Volume = {1},
   Pages = {539-544 Vol. 1},
   Year = {2005} }



@article{
xie:tvlsi,
   Author = {Yang, Shengqi and Wolf, W. and Xie, Yuan and Vijaykrishnan, N.},
   Title = {A New Methodology for Reliability-Aware Low-Power Design},
   Journal = {IEEE Transactions on Very Large Scale Integration Systems},
   Year = {} }
